The TikTok parent is developing custom data-centre processors on two parallel architectures as Intel and AMD push prices up 10-35% a quarter and US export controls bite.
ByteDance is developing its own central processing units to power the data centres behind its expanding AI infrastructure, according to a Reuters report on Thursday citing people familiar with the company’s chip programme.
The TikTok parent is pursuing two parallel design tracks, one based on Arm and another on the open-source RISC-V instruction-set architecture, while it works out which design best fits its longer-term needs.
The decision lands inside an unusually busy week for the company’s chip-diversification strategy.
The drivers are commercial and geopolitical at once. Intel and AMD, which currently supply most of ByteDance’s server-CPU footprint, have raised data-centre-grade processor prices by between 10% and 35% in successive recent quarters, according to the Reuters reporting.
ByteDance’s 2026 AI-infrastructure budget reportedly grew 25% to around 200 billion yuan ($29.4bn), a level that makes the procurement gap from those price increases material at group-level economics. Building in-house has gone from a theoretical optimisation to a balance-sheet imperative.
The Arm-and-RISC-V dual-track is the part that signals how seriously ByteDance is taking the chip work. Arm-based server CPUs are the proven path, with Amazon’s Graviton, Microsoft’s Cobalt and Google’s Axion all in production.
RISC-V, the royalty-free instruction-set originally developed at Berkeley, is less proven at server scale but is increasingly favoured inside China because it sidesteps the licensing-and-export-control exposure that comes with Arm’s UK-headquartered, Softbank-owned IP.
Chinese policymakers have explicitly endorsed RISC-V as a strategic-autonomy alternative; Beijing has been hardening its broader chip-sovereignty posture through 2026.
The wider ByteDance chip programme is now visibly multi-pronged. The company reached an agreement earlier this week with Qualcomm to supply millions of application-specific integrated circuits for AI data-centre inference, alongside Qualcomm helping ByteDance bring its own ASIC design through to production.
ByteDance has been instructed by Beijing’s National Development and Reform Commission to reject US-origin capital in funding rounds without clearance.
The travel restrictions on senior AI talent that expanded across the private sector this month apply to ByteDance staff alongside DeepSeek, Moonshot and StepFun. The custom-CPU programme is the same strategic posture extended into general-purpose server silicon.
The competitive read for Intel and AMD is the harder one. The hyperscaler defections of the past five years (AWS, Microsoft, Google) have already shifted a meaningful share of the cloud-CPU market away from the x86 incumbents toward custom Arm silicon.
ByteDance’s entry, if successful, removes another large customer from the x86 pool. The pricing-pressure spiral runs in both directions: higher x86 prices accelerate hyperscaler custom-CPU adoption, and reduced hyperscaler purchases reduce the volume base over which x86 vendors can amortise their fab costs, which raises prices further.
ByteDance, for its size, is closer to a hyperscaler than to a standard enterprise customer.
What remains unclear is the production-foundry side. Custom CPUs need leading-edge fabrication; TSMC handles most hyperscaler designs at 4nm and below, but US export controls on advanced nodes for Chinese customers complicate the path.
SMIC, China’s domestic leading-edge foundry, has reached 7nm in production but lags TSMC by roughly two nodes. ByteDance’s chip programme will have to make peace with the production-node reality even after it solves the design problem, which is the part the Reuters reporting did not yet address.
ByteDance has not commented on the design programme or projected first-silicon timelines. The company’s Beijing operations declined to confirm or deny the Reuters reporting.
